Evaluation Boards - Embedded - Complex Logic (FPGA, CPLD) (1)

Surface Mount

Number of Terminals

Ihs Manufacturer

Manufacturer Part Number

Operating Temperature-Max

Package Body Material

Package Code

Package Description

Package Equivalence Code

Package Shape

Package Style

Part Life Cycle Code

Reflow Temperature-Max (s)

Risk Rank

Rohs Code

Supply Voltage-Nom

JESD-609 Code

Terminal Finish

Terminal Position

Terminal Form

Peak Reflow Temperature (Cel)

Number of Functions

Terminal Pitch

Reach Compliance Code

JESD-30 Code

Qualification Status

Power Supplies

Temperature Grade

Supply Current-Max

Telecom IC Type